The present invention relates to a semiconductor device and a method of manufacturing the same. Particularly, the present invention is concerned with a technique applicable effectively to the manufacture of a semiconductor device wherein a semiconductor chip which generates a large amount of heat is sealed.
As a high output semiconductor device there is known a semiconductor device wherein a semiconductor chip formed with a power transistor is incorporated within a sealing body. As examples of power transistors are mentioned power MOSFET (Metal Oxide Semiconductor Field-Effect-Transistor), IGBT (Insulated Gate Bipolar Transistor), and bipolar power transistor.
A power MOSFET device is of a structure wherein a power MOSFET chip is incorporated within a sealing body. As a power MOSFET device there is known one having a structure wherein a metallic member serving as a drain terminal is exposed to the bottom of a sealing body formed of an insulating resin, and lead terminals for source and gate respectively are disposed on one side of the sealing body. The lead terminals for source and gate are partially bent and exposed to an upper surface of the sealing body. The lead terminals for source and gate extending into the sealing body are electrically connected respectively to source and gate electrodes on an upper surface of a semiconductor chip fixed onto the metallic member. These leads are ultrasonic-bonded to Au bumps which are arranged on source and gate electrodes uniformly by a wire ball bonding method. (See, for example, Patent Literature 1.) On the other hand, in connection with manufacture of a semiconductor device (LFPAK: Loss Free Package), there is known a technique wherein gold bumps are formed on a main surface of a semiconductor wafer and thereafter the semiconductor wafer is diced into individual semiconductor chips having gold bumps (bump electrodes) (see, for example, Patent Literature 2).                [Patent Literature 1]        Japanese Unexamined Patent Publication No. 2000-223634        
[Patent Literature 2]                Japanese Unexamined Patent Publication No. 2003-86787        